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Job advertisement 1222
Designing engineer for chip design, asap
Analog/mixed signal CMOS-designer with experience in VHDL
OGADO Technologies is a consulting company, based in Munich, which focusses on engineering and technical branches. OGADO seeks several competent and motivated development engineers for one of its clients, a renowned semiconductors company in the Munich Region.
A transfer of the consultant to our client at the end of the project is generally possible.
Your tasks:
- Verification of architecture
- selection and design of macros from the library
- logics-layout
- system and layout simulation
- layout synthesis
- communication with the development and test engineering departments
Qualifications:
Major in electronics with good grades
specialisation in telecommunications engineering, electronics, computer science or comparable qualification
at least 4 years of practical, relevant experience
knowledge of CADENCE are favoured
a good understanding of Verilog or other VHDL surroundings are advantagous
team player, motivation, structured and independent work style
We offer:
- remuneration above average
- performance-related bonus at the end of the project
- demanding job in a leading company and an excellent working atmosphere
Location: Munich area
If you feel adressed by this profile please send your application via e-mail or in hard copy to the below-mentioned contact adress or apply directly online, using our specific application mask [Bewerbermaske].
Contact:
Team Recruiting, Mr. Meyer
recruiting@ogado.com
Phone: +49 (0)89 288 904 22
Fax: +49 (0)89 288 904 5
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